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A.
Always 0
B.
lndeterminate(could be 0 or 1)
How many characters per second (CPS) can be transmitted over a 1000-baud line with a character code of 8 bits. in the synchronous serial transmission mode?
A.
150 cps
B.
109 cps
C.
125 cps
D.
120 cps
A.
111001000
B.
000111001
C.
111000001
D.
110000111
A.
100101111
B.
011101111
C.
011101111
D.
Cannot be converted.
A.
111011111010
B.
101011101111
C.
111011111010
D.
101011111110
Suppose the content of a 4obit register is 1010. The register is shifted five times to the right with serial input being 10110. What is the content of the register after five shifts?
A.
0101
B.
0010
C.
0110
D.
0111
A.
1
B.
2
C.
3
D.
4
Suppose you have to multiply two 20 x 20 matrices using vector processor. To calculate the product matrix. how many multiply-add operations are required?
A.
8000
B.
6000
C.
4000
D.
2000
A. 0.7963400 x 102
B. 0.6376560 x 10-1
C. 0.6376560 x 102
D. 0.7963400 x10-1
A.
ABC
B.
(~A)D
C.
AD
D.
(“A1081)
A. Data Bus
B. Keyboard
C. Mouse
D. TouchPad
A. 32,380
B. 32,384
C. 32,768
D. 32,385
A. Memory « reference
B. Input - output
C. Register — reference
State whether the following statement is true or false.
A micro-program sequencer executes a micro-instruction.
A.
True
B.
False
A. 600 clock cycles
B. 106 clock cycles
C. 105 clock cycles
D. 601 clock cycles
A. revolutions per minute
B. hertz
C. kbps
D. mbps
State whether the following statement is true or false.
Physical memory is divided into several smaller, equal-sized parts called pages.
A.
True
B.
False
A.
LDA (Load Accumulator)
B.
BSA (Branch and Save Return Address)
C.
STA (Store Accumulator)
D.
BUN (Branch Unconditionally)
Convert the following arithmetic expression from infix to RPN (Reverse Polish Notation)
A.
ABCDE+‘+
B.
ABCDEFG+'+
C.
ABCDE+‘+'FG'/
A.
1
B.
2
C.
3
D.
4
A. distributed memory
B. tightly coupled
C. loosely coupled
A. Transistor-transistor logic
B. Transmission-transistor logic
C. Transistor-transmission logic
D. Transistor-transformlogic
A.
Yes
B.
No
Which of the following options allows a direct memory access (DMA) controller to transfer data words one at a time?
A.
Bus grant
B.
Bus request
C.
Burst mode
D.
Cycle stealing mode
A. Write-back
B. Write-through
C. Both a and b
A. 110
B. 111
C. 111110
D. 111111
A. Three-address instructions
B. Two-address instructions
C. One-address instructions
D. Zero-address instructions
Assume a small crossbar switch network is used to connect two processors and five memory modules.
How many total switches (switch points) should be there?
A.
Two
B.
Four
C.
Six
D.
Eight
E.
Ten
A. Static RAM
B. Dynamic RAM
C. EEPROM
D. Cache
If an instruction is read from memory then compute the effective address in relative address mode
when the content of the Program counter is 824 and the address part of the instruction contains 24.
A.
848
B.
849
C.
850
D.
851
Which of the following Flynn‘s classifications represents an organization in which there is a common control unit that supervises many processing units?
A.
Single instruction stream. single data stream (SISD)
B.
Single instruction stream. multiple data stream (SIMD)
C.
Multiple instruction stream. single data stream (MISD)
D.
Multiple instruction stream. multiple data stream (MIMD)
What will be the output, if
Multiplicand= 10111
Multiplier: 10011?
A.
110010101
B.
110110101
C.
1011110011
D.
001100110
There is an 8-bit register AR with initial value 11000101. What would be the final value in the register AR after performing four bitwise operations. i.e. logical left shift. right circular shift. logical right shift. and left circular shift?
A.
01000100
B.
00100010
C.
01011100
D.
10001010
A. S-R Flip-flop
B. T Flip-flop
C. J-K Flip-flop
D. D Flip-flop
A. External Interrupts
B. Internal Interrupts
C. Software Interrupts
A. MRU (Most Recently Used)
B. LRU (Least Recently Used)
C. LIFO (Last In First Out) buffer
D. FIFO (First In First Out) buffer
A.
1
B.
2
C.
3
D.
4
A. Hardwired control is faster than micro-programmed control.
B. In hardwired control, memory is not used whereas in the case of micro-programmed control, control memory is used for address storage.
C. Hardwired control is more flexible than micro-programmed control.
D. As compared to hardwired control, micro-programmed control handles large/complex instruction
A. 1100
B. 1010
A. 1110
B. 1100
C. 1001
D. 0010
A. memory address
B. accumulator
C. branch and save address
D. program status word
A.
AR=10011111
B.
BR=O1000111
C.
CR=00110011
D.
DR=10101011
What will be the value in the AR register after the execution of the sequence of micro operations given in the image?
A.
11100110
B.
00100011
C.
11000011
D.
11100011
A. 1777
B. 1296
C. 1728
D. 1776
A.
1011
B.
1010
C.
0011
D.
0101
A.
X=(A+B)‘(C+D)
B.
X=AC+BD
C.
X=AB+CD
D.
X=(A+C)“(B+D)
A. BC+AC
B. B'C+AC'
C. BC'+AB
D. AB'+BC
A. 1110
B. 1220
C. 1440
D. 1330
A. 24
B. 32
C. 21
D. 11
A.
a
B.
b
C.
c
D.
d
A. Flash memory
B. Plug and Play
C. CPU clock speed
D. Atoms or nuclei
A. Characters per second
B. Quad core
C. Clock speed
D. Word size
A. Plug and Play apps
B. Firmware
C. Mashups
D. DDR2s.
A. All of these: @, !, $
B. Keyboards and pointing devices
C. The Monty Python
D. A collection of ones and zeroes
A. Cloud storage
B. Data codes
C. Binary number
D. Serial port
A. False
B. 1, on
C. Analog
D. True
A. Instruction set
B. Input, output
C. Lithium ion
D. Control unit
A. Vacuum tube technology
B. Random access memory
C. Optical storage
D. Arithmetic operation
A. Nibble
B. Decibel
C. Byte
D. Node
A. Traditional
B. Liaison
C. Advisory
D. Stabilization
A. Optical storage
B. Storage
C. Kernel
D. Second
A. Control unit
B. Decode unit
C. Prefetch unit
D. Bus interface unit
A. Control unit
B. Data path
C. Program counter
D. Nondestructive fetch
A. Mouse
B. Keyboard
C. Motherboard
D. Operating system
A. Volatile
B. Non-volatile
C. Cache
D. Secondary
A. Primary
B. Direct
C. Memory
D. Pointing
A. Transistor
B. Transistors
C. Permanently
D. Firmware
A. Firmware
B. Motherboard
C. Mega-core
D. Primary
A. Microframe, midframe, and miniframe
B. Midsize, microframe, and mainframe
C. Mainsize, midsize, and microsize
D. Mainframe, midsize, and micro
A. Interfaces
B. USB ports
C. Memory modules
D. Hard drives
A. 1, 1, 1, 1
B. 4, 7, 4, 6
C. 2, 3, 2, 3
D. 1, 3, 1, 2
E. 4, 3, 4, 3
A. Unique
B. Range
C. Totals
D. Builder
A. Memory modules
B. Motherboard
C. Usage
D. Gigabytes (GB
A. Compare
B. Addition
C. Control
D. Looping
A. Exit
B. Output
C. Entry
D. Input
A. Data as a service
B. Dynamic, static
C. False
D. Control unit and ALU
A. Integers.
B. Sounds.
C. Colors.
D. Characters
A. Optical discs
B. It cannot emit light.
C. Optical storage
D. Operating system
A. Storage media
B. Hard drive
C. Memory
D. Zip drive
A. Storage media
B. Hard drive
C. Memory
D. Zip drive
A. Arch
B. Truss
C. Dome
D. Vault
A. Address.
B. ID
C. Tag.
D. Position
A. Virtual machine
B. Host platform
C. Hypervisor
D. Virtual hardware.
A. Processor
B. System
C. Unit
D. Security
A. 3
B. 4
C. 5
D. 6
A. Portal
B. Platform
C. Application
D. Access point
A. What the system does
B. How data moves through an information system
C. How a system transforms input data into useful information
D. All of the above
A. Three
B. Seven
C. Five
D. One
A. ALU
B. Control unit
C. Prefetch unit
D. Decode unit
A. The way they are connected
B. Distance between their nodes
C. Both
D. None
A. The chip's proximity to the CPU
B. RAM memory used by the operating system
C. A Blu-ray burner will most likely burn both CDs and DVDs.
D. Increase the front side bus speed
A. Logic SHIFT
B. ROTATE
C. ADD
D. NOT
A. Storage
B. Byte
C. Cloud
D. None of these
A. CISC
B. RISC
C. OR
D. XOR
A. Byte
B. CRT
C. Point
D. Pixel
A. Levi.
B. Simeon.
C. Joseph.
D. Judah.
E. Benjamin
A. Clock speed
B. LPC bus
C. Hard drive
D. Processor
A. Integers.
B. Strings.
C. Objects.
D. All of the above
E. A and B, but not C
A. 2001::00fe:::cdef
B. 2001::fe::::cdef
C. 2001:::fe::::cdef
D. 2001:::fe::cdef
A. Develop the initial ERD.
B. Identify the business rules based on the description of operations.
C. Identify the attributes and primary keys that adequately describe the entities.
D. Create a detailed narrative of the organization’s description of operations